CISC and RISC Computers


          Compiler simplification?
         Complex machine instructions harder to exploit
         Optimization more difficult
          Smaller programs?
         Program takes up less memory but…
         Memory is now cheap
         May not occupy less bits, just look shorter in symbolic form
          More instructions require longer op-codes
          Register references require fewer bits
          Faster programs?
         Bias towards use of simpler instructions
         More complex control unit
         Microprogram control store larger
         thus simple instructions take longer to execute
         It is far from clear that CISC is the appropriate solution

CISC Characteristics

          A large number of instructions-typically from 100 to 250 instructions
          Some instructions that perform specialized tasks and are used frequently
          A large variety of addressing modes-typically from 5 to 20 different modes
          Variable-length instruction formats
          Instructions that manipulate operands in memory

RISC Characteristics

          One instruction per cycle
          Register to register operations
          Few, simple addressing modes
          Few, simple instruction formats
          Hardwired design (no microcode)
          Fixed instruction format, easily decoded instruction format
          More compile time/effort
          Relatively few instruction
          Memory access limited to load and store instruction
          Relatively large number of registers in processor unit
          Use of overlapped register windows to speed-up procedure call and return
          Efficient instruction pipeline
          Compiler support for efficient translation of HLL programs into machine language programs.
          E.g.: Sun SPARC, Berkeley RISC1


          Not clear cut
          Many designs borrow from both philosophies
          e.g. PowerPC and Pentium II …….

The Next Step - RISCReduced Instruction Set Computer

  Key features

         Large number of general purpose registers
         or use of compiler technology to optimize register use
         Limited and simple instruction set
         Emphasis on optimising the instruction pipeline


Advantages of CISC

          Microprogramming is as easy as assembly language to implement and much less expensive than hardwiring a unit
          The ease of microcoding new instructions allowed the designers to make CISC machines upwardly compatible – a new computer could run the same programs as earlier computers because the new computer would contain a superset of instructions of the earlier computers.
          As each instruction became more capable, fewer instructions could be used to implement a given task. This made more efficient use of the relatively slow main memory.
          Because microprogram instruction sets can be written to match the constructions of high-level languages, the compiler does not have to be as complicated.

Disadvantages of CISC

          Earlier generations of a processor family were generally contained as a subset in every new version- so instruction set and chip hardware become more complex with each generation of computers.
          So that as many instructions as possible could be stored in memory with the least possible wasted space, individual instructions could be of almost any length – this means that different  instructions will take different amount of clock time to execute, slowing down the overall performance of the machine.
          Many specialized instructions are not used frequently enough to justify their existence – approximately only 20% of the available instructions are used in a typical program.
          CISC instructions typically se the condition codes as a side effect of the instruction. Not only does setting the condition codes take time, but programmers have to remember to examine the condition code bits before a subsequent instruction changes them.

Advantages of RISC

          Speedà Since a simplified instruction set allows for a pipelined, superscalar design RISC processors often achieve 2-4 times the performance of CISC processors using comparable semiconductor technology and the same clock rates.
          Simpler hardware à Because the instruction set of a RISC processor is so simple, it uses up much less chip space; extra functions, such as memory management units or floating point arithmetic units, can also be placed on the same chip. Smaller chips allow a semiconductor manufacture to place more parts on a single silicon wafer, which can lower the per-chip cost dramatically.
          Short design cycle à Since RISC processors are simpler than corresponding CISC processors, they be designed  more quickly, and can take advantage of other technological developments sooner than corresponding CISC designs, leading to greater leaps in performance between generations.

Disadvantages of RISC

          Code Quality àThe performance of a RISC processor depends greatly on the code that it is executing. If the programmer (or compiler) does a poor job of instruction scheduling, the processor can spend quite a bit of time stalling-waiting for the result of one instruction before it can proceed with a subsequent instruction.
          Debugging à Unfortunately, instruction scheduling can make debugging difficult. If scheduling (and other optimizations) is turned off, the machine-language instructions show a clear connection with their corresponding lines of source. Many RISC programmers debug their code in an un-optimized, unscheduled form and then turn on the scheduler and hope that the program continues to work in the same way.

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